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Principal SoC Hardware Security Architect

rosaiclabs inc • United States
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AI Summary

Lead security architecture for compute SoCs including threat modeling, root-of-trust, secure boot, confidential I/O, and memory protection. Define security specifications across hardware, firmware, and interconnect domains; drive implementation with cross-functional RTL, DFT, verification, and host-software teams. Requires 12+ years in SoC architecture or hardware/platform security with hands-on experience taking hardware-rooted security features from specification through silicon bring-up.

Key Highlights
SoC security architecture covering threat modeling, root-of-trust, secure boot, and key hierarchy
Confidential I/O and DMA isolation across PCIe and CXL with trust-domain integration
Memory encryption and integrity requirements including HBM protection and per-trust-domain keys

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Key Responsibilities
Own the SoC threat model, security specification, trust boundaries, and key hierarchy across compute and I/O dies, memory, interconnects, host interfaces, and network links
Define the root-of-trust architecture, secure and measured boot, firmware measurement, fuse policy, and lifecycle states for platform, power-management, and dispatch firmware
Specify device, host, and trust-domain attestation including SPDM, PCIe DOE, and MCTP interfaces
Architect confidential I/O and DMA isolation across PCIe and CXL
Define memory encryption and integrity requirements including HBM protection and per-trust-domain keys
Define security boundaries for cross-die and network communication
Establish security acceptance and validation criteria including fault and glitch scenarios
Coordinate implementation with RoT firmware, boot, memory, I/O, DFT, verification, and host software teams

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Technical Skills Required
Hardware Security SoC Architecture Confidential Computing

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Job Description

Core Responsibilities

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Job Overview
Posted Nov 12, 2026
Employment Full-time
Experience Director
Location United States
Category Cyber Security
Company rosaiclabs inc
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