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Senior ASIC Modelling Engineer (C++/SystemC) - Memory Subsystem

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Leading semiconductor company seeks a Senior ASIC Modelling Engineer to model memory infrastructure and client IP for next-gen mobile/compute SoCs in Cork. Responsibilities include designing coherency protocols, NoC interconnects, and system caches while optimizing cost, performance, and power. Requires a Bachelor’s/PhD in ASIC design with 2+ years experience, strong C++/SystemC skills, and scripting proficiency.

Key Highlights
Leading semiconductor company expanding memory subsystem team in Cork
Focus on next-gen mobile and compute SoCs with cost/performance/power optimization
On-site role in Cork, Ireland
Key Responsibilities
Model memory infrastructure and client IP for SoCs
Design coherency protocols, NoC interconnects, and system caches
Optimize cost, performance, and power via architecture exploration
Collaborate with cross-functional design and verification teams
Technical Skills Required
C++ SystemC Python
Benefits & Perks
Competitive salary, stock, and performance bonus
Matching pension, employee stock purchase scheme
Life, medical, and income insurance
Education assistance and wellbeing benefits
Relocation and immigration support if needed
Nice to Have
Cache and memory controller architecture expertise
CPU, graphics, or multimedia architecture knowledge
On-chip interconnect protocols (AXI, CHI) experience
RTL design exposure

Job Description

Our client, a leading semiconductor company, is expanding its memory subsystem team in Cork. The team works on next-generation mobile and compute SoCs.

The role

You will model the memory infrastructure and client IP, and use those models to find cost, performance and power improvements at system level.

What you will be doing

  • Modelling coherency protocols, NoC interconnect fabrics, system cache and memory controllers
  • Modelling client IP, including CPU, modem, ML, graphics, display, camera, video and peripherals
  • Running architecture exploration campaigns on cost, performance and power
  • Working with cross-functional design and verification teams

What we are looking for

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