ASIC Design Engineer
Location: Singapore
I am seeking a highly skilled NPU Design Engineer to contribute to the architecture, development, and implementation of high-performance Neural Processing Units (NPUs). The role involves RTL design, system-level integration, and collaboration across hardware and software teams.
You will join a leading global developer of advanced digital imaging technologies, this company specializes in the design and manufacture of image sensors and related solutions. It serves a wide range of markets including mobile, automotive, medical, and security. Known for pushing the boundaries of pixel miniaturization and image quality, it provides innovative CMOS imaging solutions that power cameras in smartphones, autonomous vehicles, endoscopy devices, and other embedded systems.
Key Responsibilities:
- Define design requirements for NPUs based on system-level specifications.
- Participate in performance modelling and data throughput analysis.
- Design microarchitectures and implement RTL in Verilog/SystemVerilog for NPU sub-blocks.
- Analyze and optimize PPA (Performance/Power/Area) metrics.
- Optimize for low power and area efficiency.
- Collaborate closely with verification teams to ensure comprehensive test coverage and debugging.
- Support SoC-level integration, including timing analysis, lint, and CDC.
- Work alongside software teams to support compiler/toolchain development.
- Generate thorough design documentation.
Requirements:
- 8+ years in digital design, including at least 2–3 years of SoC design experience.
- Hands-on experience completing at least one full NPU design cycle.
- Strong RTL design and microarchitecture skills using Verilog/SystemVerilog
- Experience with synthesis, and power/timing/area optimization
- Previous leadership experience managing 3–4 engineers preferred.
- Solid understanding of convolution operations and number representations (fixed-point, floating-point)
Preferred Qualifications:
- Familiarity with UVM verification methodology
- Experience designing NPUs, GPUs, or DSPs
- Knowledge of SoC architectures and integration workflows
- Exposure to ARM or RISC-V based systems
- Understanding of machine learning models such as CNNs or Transformers
- Proficiency in general-purpose programming
- Background in low-power/area-optimized microarchitecture design
To be eligible for the role you must be prepared to work onsite 4 days per week.
Salary: 10,000 – 14,000 SGD per month.
Relocation and Visa sponsorship can be provided.
Note: Must speak English.
For more information, please contact Rachel Mason at IC Resources
