Senior Digital Test Chip Engineer in MALAYSIA

Working Location: Malaysia

Salary: Up to 2,760 $

Levels: Senior (5-­10 YOE)

Roles and Skills: Enginering ​

Job Overview And Responsibility

You will be part of a team responsible for digital IP development, including RAM, ROM, and digital libraries. You will have the responsibility to specify and design digital Integrated Circuit embedding the developed digital IPs to allow their Silicon validation in the context of the ISO 26262 environment.

Your Role:

1. Specifications of test chips allowing the silicon measurement of all parameters of RAM, ROM and digital libraries e.g., leakage current, power consumption, access time, peak current,... Propose a design solution allowing the most accurate measurements.

2. Develop a digital Integrated Circuit including the full development flow of RTL, Synthesis, DFT insertion, Place and Route, Physical Verification (DRC, LVS), RTL and gate level Simulation.

3. Generate functional Test patterns e.g., ATPG and custom test patterns. Define by simulation limits for parametric tests with Static Timing Analysis reports, Power Analysis reports

4. Evaluate new DFT methodology, e.g., Cell­Aware Test patterns

5. Documentation relative to Test Chips datasheet and test datasheet

6. Interface with Test Engineers, organize debug session for issue analysis

7. Contribute to QA flow for digital IP usage. Interface with digital IP designers. Report and document improvement for better digital IP integration/usage.

8. Specify and design Test Qualification Vehicle for digital IP and technology process qualification and demonstrator to highlight the capability of the technology and digital IP portfolio.

Required Skills and Experience

• Master or higher in Electronics Engineering.

• Minimum 5 years of working experience in developing digital Integrated Circuit. Mandatory Back­End digital design skills (Place and Route, Physical Verification). Front­End digital design (RTL) is an advantage.

• Good knowledge and understanding of digital circuits

• Experience with Place and Route tool for floor planning, CTS and routing, and Physical Verification (LVS, DRC)

• Timing Analysis and Power Analysis

• Synthesis and DFT insertion

• RTL design and verification experience is a plus

• Scripting (TCL, perl, python) for automatization

Why Candidate should apply this position

• You will be part of the team developing state-of-the-art digital libraries allowing the best PPA digital design, mainly dedicated to the automotive market.
• ­Relocation assistance for expats.
• ­ Relocation allowance: 1 month of salary
• ­ Home passage: return trip tickets for employee, spouses, and kids to home country once a year
• ­ Children international education fee by employer
• ­ Career development and training
• ­ Work­life balance
• ­ International secondment program
• ­ Pension provisions
• ­ Bonus schemes
• ­ Health and prevention programs
• ­ Cafeteria and meal subsidy
• ­ Free parking
• ­ Hybrid working (1 day WFH per week)

Prefer if candidate have

RTL design and verification experience is a plus

Reporting to

Global Manager based in France

Interviewing Process

Interview with Team Lead/ Manager in Kuching and General Manager in EU (Can split into 2 separate interviews based on schedule)