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Senior ASIC/FPGA Design Engineer

ApTask • United State
Remote
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Design and develop digital and mixed-signal ASICs and FPGAs using HDL (VHDL, Verilog, SystemVerilog). Develop verification methodologies, test benches, and conduct timing and signoff analysis. Collaborate with cross-functional teams on implementation challenges and lab integration.

Key Highlights
7+ years of experience in ASIC design and implementation required
Remote position with potential relocation to client site if converted to FTE
Full ASIC/FPGA lifecycle experience preferred including RTL2GDSII signoff flows
Key Responsibilities
Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs
Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog)
Develop verification methodologies and test benches for block and system-level verification
Create and execute test plans, develop test harnesses, and implement coverage models
Conduct timing analysis, noise analysis, and other signoff checks
Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering
Support lab integration and troubleshooting activities
Resolve design issues and drive solutions for timing, congestion, and other implementation challenges
Technical Skills Required
ASIC Design FPGA Design HDL Programming (VHDL, Verilog, SystemVerilog)
Benefits & Perks
Remote work opportunity
Nice to Have
Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field
Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test)
Experience with Software-Defined Radio Architectures, ADC/DAC, and/or DSPs
Knowledge of DSP and communications systems including spread spectrum, forward error correction, and modulation types
Strong object-oriented programming and scripting skills (Python, TCL, Perl)
Experience with physical design flows and industry-standard EDA tools
Experience with RTL2GDSII physical design and signoff flows
Knowledge of deep sub-micron FinFET and CMOS technologies
Experience with DFT/Scan/MBIST/LBIST methodologies
Experience mentoring junior engineers

Job Description

Remote - Must be willing to relocate to a Client site if converted to FTE

Key Responsibilities:

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