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Senior ASIC/FPGA Design & Verification Engineer (Aerospace & Defense)

HireTalent • United State
Remote
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Lead end-to-end design and verification of digital and mixed-signal ASICs and FPGAs for aerospace applications. Develop HDL-based solutions, build robust verification methodologies, and collaborate cross-functionally to ensure timing, noise, and signoff compliance. Requires 7+ years of hands-on ASIC/FPGA experience and expertise in Linux environments and design verification.

Key Highlights
End-to-end ASIC/FPGA design and verification for aerospace applications
7+ years of hands-on experience in digital/mixed-signal ASIC and FPGA design
Collaboration with systems, firmware, architecture, and product engineering teams
Key Responsibilities
Design and develop digital ASICs, FPGAs, and mixed-signal ASICs for aerospace applications
Implement designs using VHDL, Verilog, and SystemVerilog
Build verification methodologies, test benches, test plans, and coverage models (block and system level)
Conduct timing/noise analysis and other signoff checks
Collaborate with systems, firmware, architecture, and product engineering teams
Support lab integration and troubleshoot timing/congestion issues
Technical Skills Required
ASIC/FPGA Design HDL (VHDL, Verilog, SystemVerilog) Design Verification & Test Bench Development
Benefits & Perks
Remote work with relocation requirement for FTE conversion
Contract-to-FTE potential with 8+ month commitment
Nice to Have
MS/PhD in Electrical/Computer Engineering
Full ASIC/FPGA lifecycle exposure
SDR architectures, ADC/DAC, DSP expertise
Python/TCL/Perl scripting experience
Physical design/RTL-to-GDSII flow knowledge
Mentoring junior engineers

Job Description

Title: ASIC / FPGA Design & Verification Engineer (Aerospace)

Contract: 8-month+ Possible Extension/ FTE

Location: Remote (must relocate to a company site in Austin, TX or Southern CA if converted to FTE)

Job Description:

We're hiring an ASIC/FPGA Engineer to design and verify digital and mixed-signal ASICs and FPGAs end to end.

What you'll do:

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