Senior ASIC Verification Engineer
Develop and maintain ASIC/SoC verification testbenches, tests, and VIPs using SystemVerilog and UVM for a fully onsite project in Sweden. Implement SystemVerilog Assertions (SVA), manage functional and code coverage, and drive regression flows to ensure verification closure. Requires 5-20 years of experience in digital design verification with strong expertise in UVM, SVA, and Linux-based development environments.
Key Highlights
Key Responsibilities
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Job Description
Company Description: Chip Smart Technologies Pvt Ltd is a fast-growing design services company focused on delivering world-class VLSI design solutions that enable smarter, more secure technologies.
🚀 Hiring: Senior ASIC Verification Engineers | Sweden 🇸🇪
We are looking for 30 ASIC Verification Engineers, with a strong preference for Senior-level engineers (5 to 20 Years Exp), for a fully onsite project in Sweden.
Role Description: Key Responsibilities
Hands-on ASIC / SoC Verification
Develop verification testbenches from scratch
Develop tests using SystemVerilog & UVM
Develop and maintain drivers, monitors, scoreboards & sequences
Develop, integrate and maintain Verification IPs (VIPs)
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